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Switch Settings
Interrupt Enable Settings
Positions 3 and 5 of the
handles interrupts.
settings. Refer to the ADSP-TS201S processor data sheet at
http://www.analog.com/UploadedFiles/Data_Sheets/ADSP_TS201S.pdf
for more information.
Table 2-5. Interrupt Enable Settings (SW2 Position 3)
SW2 Position 3
OFF
ON
Table 2-6. Interrupt Enable Settings (SW2 Position 5)
SW2 Position 5
OFF
ON
Link Port Width Settings
Positions 4 and 6 of the
Table 2-7
and
link port data widths. Refer to the ADSP-TS201S processor data sheet at
http://www.analog.com/UploadedFiles/Data_Sheets/ADSP_TS201S.pdf
for more information.
Table 2-7. Link Port Width Settings (SW2 Position 4)
SW2 Position 4
OFF
ON
2-8
switch determine how each of the processors
SW2
Table 2-5
and
Interrupt Enable Mode for Processor A (U11)
Disable interrupts, level-sensitive mode (default)
Enable interrupts, edge-sensitive mode
Interrupt Enable Mode for Processor B (U12)
Disable interrupts, level-sensitive mode (default)
Enable interrupts, edge-sensitive mode
switch determine the link port data width.
SW2
Table 2-8
show the available settings for the two types of
Link Port Data Width for Processor A (U11)
1-bit link port data width (default)
4-bit link port data width
ADSP-TS201S EZ-KIT Lite Evaluation System Manual
Table 2-6
show the available interrupt
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