Digi PortServer/8 User Manual page 83

Test 2 - Memory Test
Each pass of this test performs a pattern test and an address tag test to DRAM memory.
The byte pattern is incremented for each pass and is displayed on the front panel LEDs 0-7
(TD-RI). The pattern is written to 32K bytes beginning at address 08000h. The pattern is
written again to 32K bytes beginning at address 30000h. The two 32K blocks are compared to
determine pass or fail status.
The address tag test writes 32K bytes beginning at address 08000H. Address 08000h equals a
0h, 08001h equals a 1h, etc. This same tag pattern is written 32K times beginning at address
30000h. The two 32K blocks are compared to determine pass or fail status.
The word pattern is incremented for each pass and is displayed on the front panel LEDs 0-7
(TD-RI). The pattern is written to 32K words beginning at address 10000h. The pattern is
written again to 32K words beginning at address 20000h. The two 64K blocks are compared to
determine pass or fail status.
The address tag test writes 32K words beginning at address 10000h. Address 10000h equals a
0h, 10002h equals a 2h, etc. This same tag pattern is written 32K times beginning at address
20000h. The two 64K blocks are compared to determine pass or fail status.
Test 3 - Memory/DMA Test
This test uses DMA0 to move data from one memory location to another. The byte pattern is
incremented for each pass and is displayed on the front panel LEDs 0-7 (TD-RI). The pattern is
written to 32K bytes beginning at address 08000h. DMA0 is used to move 32K of data from
08000h to 10000h. When the move is complete, DMA0 interrupts and the two 32K blocks are
compared to determine pass or fail status. If the DMA transfer is not completed within two
seconds, a timeout error causes the test to fail.
Test 4 - Async Internal Test
This test is used to check out the 16550 async ports. The test puts the UART in loopback mode.
The four output signals, DTR, RTS, OUT1, and OUT2 are looped back to the four input signal
lines, CTS, DSR, RI and DCD. These signals are checked for high and low conditions. The
UARTs are initialized to 9600 baud, 8 data bits, 1 stop bit, and no parity. Data is transmitted
and received by the same UART.
Received data is compared to the transmitted data. As each port is being tested, port test results
("Pass/FAIL") are displayed. A failure on one or more ports is considered a test "FAIL."
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