Table 7-1 Handshake Encoding - ARM ARM946E-S Technical Reference Manual

7.2.2 Coprocessor handshake encoding
7.2.3 Multiple external coprocessors
ARM DDI 0155A
Table 7-1 shows how the handshake signals CHSDE[1:0] and CHSEX[1:0] are
encoded.
Note
If an external coprocessor is not attached in the ARM946E-S embedded system, the
CHSDE[1:0] and CHSEX[1:0] handshake inputs must be tied off to indicate
ABSENT.
If multiple external coprocessors are to be attached to the ARM946E-S interface, you
can combine the handshaking signals by ANDing bit 1, and ORing bit 0. In the case of
two coprocessors that have handshaking signals CHSDE1, CHSEX1 and CHSDE2,
CHSEX2 respectively:
CHSDE[1] = CHSDE1[1] AND CHSDE2[1]
CHSDE[0] = CHSDE1[0] OR CHSDE2[0]
CHSEX[1] = CHSEX1[1] AND CHSEX2[1]
CHSEX[0] = CHSEX1[0] OR CHSEX2[0].
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Coprocessor Interface

Table 7-1 Handshake encoding

[1:0] Meaning
10 ABSENT
00 WAIT
01 GO
11 LAST
7-7