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Receiver C10ck-iRxC)
The serial data on input RxD is clocked into the
Am9551 by the RxC clock signal.
In the synchronous mode, RxC is
determined by the baud rate and sup1ied by the modem.
In the
asynchronous mode, RxC is 1, 16, or 64 times the baud rate selected by
the mode control instruction.
Data is sampled by the Am9551 on the
rising edge of RxC.
Recei vel" Ready (RxRlffi
The RxRDY output si gna1
indicates to the
processor that data has been shifted from the receiver section into the
receiver buffer and can be read.
The active high RxRDY signal is reset
when the buffer is read by the processor.
RxRDY can be activated only
if the receiver enable (RxE) has been set in the command register, even
though the receiver mi ghtbe running.
If the processor does not read
the recei vel" buffer the next character is shi fted from the recei vel"
section, an overrun error is indicated in the status buffer.
Sync Detect (SYNDET)
This signal is used only in the synchronous mode.
It can be either an output or input depending on whether the program is
set for internal or external synchronization.
As an output, a high
level indicates when the sync character has been detected in the
received data stream after' the internal synchronization mode has been
programmed.
If the
Am9551
is
programmed
to
ut i 1i ze
two
sync
characters, SYNDET wi 11 go to a hi gh 1eve1 when the 1ast bi t of the
second sync character is recei ved.
SYNDET is reset when the status
buffer is read or \llhen a reset s
oj
gna1 is act i vated.
SYNDET wi 11
perform as
an
input when
the
external
synchron i zat i on
mode
is
programmed.
External logic can supply a positive-going signal to
indicate to the Am9551 that synchronization has been achieved.
This
will cause it to initiate the assembly of characters on the next
falling edge of RxC.
To successfully achieve synchronization, the
SYNDET signal should be ma'intained in a high condition for at least one
full RxC period.
Transmit Data (TxD)
Serial data is transmitted to the communication
line on the TxD output.
Transmitter
C1ock~&l
The serial data on TxD is clocked out with the
TxC* signal.
The relationship between clock rate and baud rate is
simi 1ar to that for RxC*.
Data is shi fted out of the Am9551 on the
falling edge of TxC*.
Transmitter Ready (TxRDY)
The TxRDY output signal goes high when data
in the transmi t data buffer has been shi fted into the transmi tter
section allowing the transmit data buffer to accept the next byte from
the processor.
TxRDY is reset when information is written into the
transmit data
buffer~
Loading the command register also resets TxRDY.
TxRDY is available only when the Am9551 is enabled to transmit (CTS*
=
0,
TxEN
=
1). However, the TxRDY bit in the status buffer will always
be set when the transmit data buffer is empty regardless of the state
of TxEN and CTS*.
Transmitter Empty (TxE)
The TxE output signal goes high when the
transmitter section has transmitted its data and is empty.
The signal
remains high until a new data byte is shifted from the transmit data
4-7
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