Table of Contents
Advertisement
TABLE 3-4.
COMMAND SUMMARY
Command Description
Data Pointer register with contents of E and G fields.
000, G ,;. 110)
--
------------
counting for all selected counters
contents of specified source into all selected counters
- -
and Arm all selected counters
- - - - .
rm and Save all selected counters
..
_--
e all selected counters in hold register
rm all selected counters
output bit N (001 ,,;;N,,;; 101)
r output bit N (001 ,,;; N ,,;; 101)
--~_.
--
~
counter N (001 ,,;; N ,,;; 101)
MM14 (Disable Data Pointer Sequencing)
---'
-~--~' "'~'-"-"-
"
MM12 (Gate off FOUT)
---------_.~-_._----_.
__
..•
-
......
_
..
_
.•.
-
MM13 (Enter 16-bit bus mode)
- --
--------_._._----~----_.-
...
_--_.-
- ,
r MM14 (Enable Data Pointer Sequencing)
_._---_._-
-
- - - -
r MM12 (Gate on FOUT)
.....
~ ~ - - - ~ - ~ - - - _ . _ , - _
..•
_..
,--_._~.~.--
.,
..
_.
__
._~._-----
...... _
.•.
-
r MM13 (Enter a-bit bus mode)
-------
..
-------
..
-._- ------------
'-
ter reset
Load
Load
Set
Set
Step
Set
Disa
Sav
Arm
elea
Load
(G
1
Disa
o
o
Command COI:fe
I--C-7-.,....-C-6--.--C-5~
C4 ]
C 3 @ C1
CO
~
,f±-
~;~t ;~ ~~;-~ ; ~
-----_...
+_._--~--
--..--- -
---- ---
-)=t.
:+j + +1it~ ~~-;~
: :
___
--.-+-------i--~--
_+
+--S_1--+_
~ii=+t=)tEi =ij~i---+---~-·~---f-------_-.-
1
;
1
;
1
0
i
1
0
to
-------_. . . . -._-----+---
--
-- -_. . -
---
1
'
1
I
1
0
1
1
1
---·----+-----t.---
..------.---
----. ---
1
•
1
i
1
0
1
1
1
1
Set
==~=::-'1'-()-
:
0 -
~O}O=1:0
_
~I~.
+-~
:
l;1
1
-
6 - . ·-~-·-·-t:t+
---i-
o n
6:::
----, - --t--,--- ----,-
I
-1-
"Q-1
Mas
....---'---------_._._----.--'
MASTER MODE RI:GISTER
The 16-bit Master Mode (MM) register is used to control those internal
activities that are not controlled by the individual Counter Mode
registers.
This includes frequency control, time-of-day operation,
comparator controls, data bus width and data pointer sequencing. Figure
3-13 shows the bit assignments foy' the Master Mode register.
Each
control field is described in the following paragraphs.
After power-on reset or a Master Reset command, the Master Mode
register is cleared to an all zero condition.
This results in the
following configuration:
Time-of-day disabled
Both Comparators disabled
FOUT Source is frequency F1
FOUT Divider set for divide-by-16
FOUT gated on
Data Bus 8 bits wide
Data Pointer Sequencing enabled
Frequency Scaler divides in binary
3-19
Advertisement
Table of Contents
