Advanced Micro Computers Am96/4116A User Manual page 12

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physical address space.
It is possible to write to RAM, but RAM can
only be accessed for read when the shadow ROM is disabled.
This
permi ts all or portions of ROM to be copi ed to RAM and then the ROM
turned off.
There are 32K bytes of dynamic RAM included on the Am96/4116 board,
configured as two-port (dual access) memory.
Sixteen 16,384 by 1,
N-channel dynamic R/W RAMs are used.
With 200 nanosecond RAMs, no watt
state is needed.
RAM can be simultaneously accessed from the Multibus interface and the
AmZ8002 CPU.
Access arbi trat i on for two-port operati on provi des 50
percent interleave of ArnZ8002 and Multibus access.
Control defaults to
the AmZ8002 if no Multibus requests are active.
An 8259A provides an eight channel vectored priority interrupt system.
The eight channels can be programmed to perform priority resolution on
either a fixed or rotating basis in either an interrupt or polled mode,
allowing the user flexibility to establish interrupt service priorities
based upon individual requirements.
The eight inputs to the 8259A are jumper selectable from an interrupt
matrix.
Selection can be from eight gated Multibus interrupts, four
serial port (Am9551) interrupts, one parallel port (Am8255A) interrupt,
and interrupts from the timer chip (Am9513).
Non-maskable interrupts are also produced and are, Multibus power fail,
timeout for AmZ8002 access to Multibus,
selected
interrupt from
interrupt matrix, and odd word trap.
The system contains one Arn8255A Programmable Peripheral
Interface
containing three parallel I/O ports. Two 8-bit ports are buffered with
bidirectional buffers.
The buffer direction for each port is selected
by jumper to provide either input, output or dynamic direction control
using a bit from one of the two 4-bit ports. The remaining port on the
Am8255A is configured as two 4-bit ports socketed for drivers or
receivers (optional).
Signals from each 4-bit port are used as
interrupt signals at the interrupt matri x.
The I/O
1
i nes are brought
out at the 50 pin connector P3 at the top of the board.
Two Am9551 Programr.1able Communications Interfaces provide two serial
I/O ports.
One of these ports supports a full RS232C interface.
The
other supports a modified RS232C interface where, Data Set Ready, and
Clear to Send signals ar'e omitted.
The Am9551 provides full duplex,
buffered transmi t and recei ve capabi
1
it i es.
A programmable baud rate
generator
provi des
baud
rates
between
50
and
9 ,600
baud
for
asynchronous data transmission, and up to 38,400 baud for synchronous
operation.
Each communications
interface can
be
programmed
to
implement the desired synchronous or asynchronous serial data protocol.
Data format, control character format, and pari ty are under program
control.
Parity, overrun, and
framing
error detection are all
incorporated on the programmable communications interface.
Command and
control lines, serial data lines, and signal ground lines are brought
out to P4 and P5 at the top the board.
1-4

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