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CHAP1"ER 4
'THEORY OF
~OPERATION
INTRODUCTION
This chapter provides a functional
description of the Am96/4116A,
MonoBoard Computer.
Figure 4-1 is a block diagram of the Am96/4116A.
Both active high and active low signals appear on the schematics.
To
eliminate confusion and simplify presentation, the following convention
is adhered to in this manual:
whenever a signal is low-true, its
mnemonic is followed by an asterisk (*).
For example, MEMR* denotes a
low-true signal. There is no asterisk for
high~true
signals.
CENTRAL PROCE!)SING UNIT (C:PU)
The CPU consists of an AmZ8002 16-bit microprocessor, clock circuitry,
and associated buffer and control cillcuitry.
The ArnZ8002 is a general purpose 16-bit CPU with a 16-bit multiplexed
address and data bust which can directly address 64K bytes (32K words)
of memory.
There
arE~
four status output
1
i nes (STO to ST3) to i ndi cate
the type of bus access; a Normal/System output for selecting Normal
(user) or System (pri vi
1
eged) memory space; a Byte/Word output to
permit addressing of either bytes (B··bit) or 16-bit words.
Decoding of
the status outputs is provided for I/O functions, code or data
functions, and memory operations.
One decoded signal is I-FETCH*,
which can be jumpered and used externally to select either code or data
areas of off-board
mE~mory.
The Normal/System (N/S*) output can also be
jumpered and used externally to select Normal or System areas of
memory.
The clock circuit is made up of an 8 MHz oscillator, flip-flop (U83)
and a clock driver circuit.
The dlriver circuit is required to drive
the AmZ8002.
As sh"j pped from the factory, jumpers are i nsta
11
ed at
pins 150-151, 153-154, and 163-164.
Flip-flop U83 divides the
oscillator output to provide a 4 MHz clock for the CPU.
A failsafe timer is available to generate a timeout (TIME OUT*) signal
to interrupt the processor to prevent hanging up the CPU if memory or a
device does not respond within approximately
10~s.
NOTE
It is recommended that the TIME OUT* signal be used
as an interrupt source.
4-1
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