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Bit CM4 selects binary or BCD counting. This option greatly simplifies
the interface with the host system by helping to minimize format
conversions.
Indeed, this capability can be used in some cases to make
conversions.
Bit CM5 controls the repetition of the count process.
When CM5
=
1,
counti ng wi
11
proceed in the speci fi ed mode unti
1
the counter is
disarmed or the mode is changed.
When CM5
=
0, the count process will
proceed only until one or two TC events occur.
The counter is then
disarmed automatically. The single or double TC requirement depends on
the state of other control bits.
When TC occurs, the counter is always reloaded with a value from either
the Load regi ster or the Hold regi ster.
Bi t CM6 speci fi es the source
options for reloading the counter.
When CM6
=
0, the contents of the
Load regi ster wi
11
be transferred into the counter at every occurrence
of TC, and when CM6
=
1, the counter reload location will be either the
Load or Hold Register.
These locations can alternate or can be
controlled by a 'GATE pin.
With alternating sources and with the toggle
output selected, the duty cycle of the output
wavefor~
is controlled by
the relative Load and Hold values and very fine resolution of duty
cycle ratios will then be available in many circumstances.
Bit CM7 controls the special gating functions that allow retriggering
and the selection of Load or Hold sources for counter reloading.
The
use and definition of CM7 depends on the status of the Gating Control
field and bits CM5 and CM6.
~~hen
some
form
of
Gating
is
specified,
CM7
control s
hardware
retriggering.
In this case, when CM7
=
0, hardware retriggering does
not occur; when CM7
=
1, the counter is reloaded any time an act i ve
Gate input occurs.
Any timE! that retri ggeri ng occurs, the Counter
contents are transferred into the Hold register.
When No Gating is
specified, the definition of CM7 changes.
In this case, when CM7
=
0,
the Gate input has no effect on the counting; when CM7
=
1, the Gate
input specifies the source used to reload the counter when TC occurs.
COUNT SOURCE SELECTION
Counter Mode bits CM8 through CM12 specify the source used as input to
the counter and the active edge that is counted. Bit CM12 controls the
polarity for all the sources with logic zero indicating active high and
logic one indicating active low.
Bits CM8 through CMll select one of
sixteen counting sources to route to the counter input.
Fi ve of the
. available inputs are internal frequencies derived from the internal
oscillator.
Ten of the available inputs are interface pins; five are
labeled SRC and five are labeled GATE.
The sixteenth available input is the TC output from the adjacent lower
numbered counter.
(The Counter 5 TC wraps around to the Counter 1
input.)
This option allows internal concatenating that permits very
long counts to be accumulated.
Since all five counters can be
3-30
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