Output Control; Counter Mode Register Bit Assignments - Advanced Micro Computers Am96/4116A User Manual

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Count Control
OXXXX
=
Disable Special Gate
1XXXX
=
Enable Special Gate
XOXXX = Reload from Load
X1XXX = Reload from Load or Hold
XXOXX = Count Once
XX 1XX
=
Count Repetitively
XXXOX = Binary Count
XXX1X
=
BCD Count
XXXXO
=
Count Down
XXXX1 = Count Up
Output Control - - -
000
=
Inactive. Output Low
001
=
Active High Terminal Count Pulse
010 ~ TC Toggled
011
=
Illegal
100
=
Inactive. Output High Impedance
101 Active Low Terminal Count Pulse
110 Illegal
111
=
Illegal
Gating Control
000 = No Gating
001 Active High Level TCN I
010
=
Active High Level GATE N+ 1
011
=
Active High Level GATE N 1
100= Active High Level GATE N
101
=
Active Low Level GATE N
110
=
Active High Edge GATE N
111
=
Active Low Edge GATE N
[
Count Source Selection
OXXXX = Count on Rising Edge
1 XXX X = Count on Falling Edge
XOOOO = TCN - 1
X0001
=
SRC 1
X0010 = SRC 2
XOOll = SRC 3
X0100 = SRC 4
X010l = SRC 5
X0110
=
GATE!
XOlll
=
GATE 2
Xl000
=
GATE 3
Xl00l
=
GATE 4
Xl0l0
=
GATE 5
Xl0ll = Fl
Xll00
=
F2
Xll0l=F3
Xlll0=F4
Xllll
=
F5
'--_...L-_......._ _
. l - - _ - L . _ - - ' "
._--J
...L-_-L._--JL...-_~
_
_ L_ __._JL_._...L__
__L_C_ME
Figure 3-17. Counter Mode Register Bit Assignments
OUTPUT CONTROL
Counter Mode bits CMO through CM2 specify the output control
configuration. The OUT pin can be off and in a high impedance state or
it can be off with a low impedance to ground. The six rema i ni ng
combinations are split into active-high and active-low versions of the
three basic output waveforms.
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