Xilinx LogiCORE IP v1.02a Product Manual page 5

Introduction
The LogiCORE™ I/O Module is a highly
integrated and light-weight implementation of
a standard set of peripherals.
The I/O Module is a standalone version of the
tightly coupled I/O Module included in the
LogiCORE MicroBlaze™ Micro Controller
System (MCS). Using the I/O Module, a system
equivalent to MicroBlaze MCS can be design
using the ISE® Design Suite Embedded Edition
or the Vivado™ Design Suite.
The I/O Module connects to MicroBlaze
through the lmb_v10 bus.
Features
• LMB v1.0 bus interfaces to communicate
with MicroBlaze
• I/O Bus
• Interrupt Controller with fast interrupt
mode support
• UART
• Fixed Interval Timers
• Programmable Interval Timers
• General Purpose Inputs
• General Purpose Outputs
I/O Module v1.02a
PG052 October 16, 2012
LogiCORE IP Facts Table
Supported
Device
(1)
Family
Supported
User Interfaces
Resources
Design Files
Example
Design
Test Bench
Constraints
File
Simulation
Model
Supported
(3)
S/W Driver
Design Entry
Simulation
Synthesis
Provided by Xilinx @
Notes:
1. For a complete list of supported derivative devices, see the
Embedded Edition Derivative Device
2. Supported in ISE Design Suite implementations only.
3.
Standalone driver details can be found in the EDK or SDK
directory (<install_directory>/doc/usenglish/
xilinx_drivers.htm). Linux OS and driver support information is
available from
4. For the supported versions of the tools, see the
Tools: Release Notes
5. Supports only 7 series devices.
www.xilinx.com
IP Facts
Core Specifics
(2)
Zynq™-7000 , Virtex-7, Kintex™-7, Artix™-7,
Virtex-6, Spartan-6, Virtex-5, Virtex®-4,
Local Memory Bus (LMB), Dynamic
Reconfiguration Port (DRP)
Provided with Core
VHDL Behavioral
Tested Design Flows
Xilinx Platform Studio (XPS)
Mentor Graphics ModelSim
Xilinx Synthesis Technology (XST)
Vivado Synthesis
Support
www.xilinx.com/support
Support.
.
//wiki.xilinx.com
Guide.
Product Specification
Spartan®-3
See Table 2-2.
ISE: VHDL
Vivado: RTL
Not Provided
Not Provided
Not Provided
Standalone
(5)
Xilinx Design
5