Initial Reset - Epson S1C63616 Technical Manual

2.2 Initial Reset

The S1C63616 should be reset to initialize the internal circuits. There are two ways of doing this.
(1) External initial reset by the RESET terminal
(2) External initial reset by simultaneous high input to P10–P13 ports (mask option)
The circuits are initialized by either (1) or (2). When the power is turned on, be sure to initialize using the
reset function. It is not guaranteed that the circuits are initialized by only turning the power on.
Figure 2.2.1 shows the configuration of the initial reset circuit.
OSC1
OSC1
oscillation
OSC2
circuit
Mask option
P10
P11
P12
P13
RESET
V
SS
2.2.1 Reset terminal (RESET)
Initial reset can be executed externally by setting the reset terminal to a high level (V
initial reset is released by setting the reset terminal to a low level (V
The reset input signal is maintained by the RS latch and becomes the internal initial reset signal. The RS
latch is designed to be released by a 16 Hz signal (high) that is divided by the OSC1 clock. Therefore in
normal operation, a maximum of 16,396/f
the internal initial reset is released after the reset terminal goes to low level. Be sure to maintain a reset
input of 0.1 msec or more. However, when turning the power on, the reset terminal should be set at a high
level as in the timing shown in Figure 2.2.1.1.
Note that a reset pulse shorter than 100 nsec is rejected as noise.
The reset terminal should be set to 0.9•V
more.
After that, a level of 0.5•V
The reset terminal incorporates a pull-down resistor and a mask option is provided to select whether the
resistor is used or not.
1 kHz
16 Hz
Divider
1 Hz
Time
authorize
circuit
Fig. 2.2.1 Configuration of initial reset circuit
seconds (500 msec when f
OSC1
1.3 V
V
DD
RESET
Power on
Fig. 2.2.1.1 Initial reset at power on
or more (high level) until the supply voltage becomes 1.3 V or
DD
or more should be maintained more than 2.0 msec.
DD
Mask option
Noise
reject
circuit
R Q
S
) and the CPU starts operating.
SS
OSC1
0.9•V or more (high level)
DD
0.5•V
DD
2.0 msec or more
SIC63616-(Rev. 1.0) NO. P11
Internal
initial
reset
). After that the
DD
= 32.768 kHz) is needed until
3240-0412