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4 p
Chapter
The peripheral circuits of S1C63616 (timer, I/O, etc.) are interfaced with the CPU in the memory mapped I/
O method. Thus, all the peripheral circuits can be controlled by accessing the I/O memory on the memory
map using the memory operation instructions. The following sections explain the detailed operation of each
peripheral circuit.

4.1 Memory Map

The S1C63616 data memory consists of 2,048-word RAM, 2,048-word mask ROM, 2,048-bit display memory
and 170-word peripheral I/O memory. Figure 4.1.1 shows the overall memory map of the S1C63616, and
Table 4.1.1 the peripheral circuits' (I/O space) memory maps.
0000H
0800H
8000H
8800H
F000H
FF00H
FFFFH
Note: Memory is not implemented in unused areas within the memory map. Further, some non-implemen-
tation areas and unused (access prohibition) areas exist in the peripheral I/O area. If the program
that accesses these areas is generated, its operation cannot be guaranteed. Refer to the I/O memo-
ry maps shown in Table 4.1.1 for the peripheral I/O area.
eripheral
RAM area
Unused area
Data ROM area
Unused area
Display memory area
Unused area
I/O memory area
Fig. 4.1.1 Memory map
C
irCuits and
F000H
Display memory area
F36FH
Unused area
FF00H
Peripheral I/O area
FFFFH
SIC63616-(Rev. 1.0) NO. P16
o
peration
3240-0412

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