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4.9.3 Basic count operation
This section explains the basic count operation when each timer is used as an individual 8-bit timer.
Each timer has an 8-bit down counter and an 8-bit reload data register.
The reload data register RLDx0–RLDx7 is used to set the initial value to the down counter.
By writing "1" to the timer reset bit PTRSTx, the down counter loads the initial value set in the reload
register. Therefore, down-counting is executed from the stored initial value by the input clock.
The PTRUNx register is provided to control the RUN/STOP for each timer. By writing "1" to this register
after presetting the reload data to the down counter, the down counter starts counting down. Writing "0"
stops the input count clock and the down counter stops counting. This control (RUN/STOP) does not affect
the counter data. The counter maintains its data while stopped, and can restart counting continuing from
that data.
The counter data can be read via the data buffer PTDx0–PTDx7 in optional timing. However, the counter
has the data hold function the same as the clock timer, that holds the high-order data (PTDx4–PTDx7) when
the low-order data (PTDx0–PTDx3) is read in order to prevent the borrowing operation between low- and
high-order reading, therefore be sure to read the low-order data first.
The counter reloads the initial value set in the reload data register when an underflow occurs through the
count down. It continues counting down from the initial value after reloading.
In addition to reloading the counter, this underflow signal controls the interrupt generation and pulse
(TOUT_A signal) output. The underflow signal of Timer 1 (Ch.A) is also used to generate the clock to be
supplied to the serial interface and R/f converter.
PTRUNx
PTRSTx
RLDx0–x7
Count clock
PTDx7
PTDx6
PTDx5
PTDx4
PTDx3
PTDx2
PTDx1
PTDx0
A6H
Preset
Fig. 4.9.3.1 Basic operation timing of down counter
SIC63616-(Rev. 1.0) NO. P101
F3H
Reload &
underflow interrupt
3240-0412
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