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ESMT
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
Address
BA0, BA1
Function
RFU
Test Mode
A8
A7
Type
0
0
Mode Register Set
0
1
Reserved
1
0
Reserved
1
1
Reserved
Write Burst Length
A9
Length
0
Burst
1
Single Bit
POWER UP SEQUENCE
1.Apply power and start clock, Attempt to maintain CKE = "H", DQM = "H" and the other pin are NOP condition at the inputs.
2. Maintain stable power , stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 is regardless of the order.
The device is now ready for normal operation.
Note :
1. RFU(Reserved for future use) should stay "0" during MRS cycle.
2. If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
3. The full column burst (256 bit) is available only at sequential mode of burst type.
Elite Semiconductor Memory Technology Inc.
A11~A10/AP
A9
RFU
W.B.L
CAS Latency
A6
A5
A4
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
A8
A7
A6
A5
TM
CAS Latency
Burst Type
Latency
A3
Type
Reserved
0
Sequential
Reserved
1
Interleave
2
3
Reserved
Reserved
Reserved
Reserved
M12L64164A
A4
A3
A2
A1
BT
Burst Length
Burst Length
A2
A1
A0
BT = 0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Reserved Reserved
1
0
1
Reserved Reserved
1
1
0
Reserved Reserved
1
1
1
Full Page Reserved
Full Page Length : 256
Publication Date: May 2008
Revision: 3.3
A0
BT = 1
1
1
2
2
4
4
8
8
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