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Specifications are subject to change without notice
Input Instruction Hold After PSEN high
Input Instruction Float After PSEN high
Port 0 Address to Valid Instruction
Port 2 Address to Valid Instruction
PSEN Low to Address Float
A L E
P S E N
P o rt 0
P o rt 2
9-9 Digital Video Output Interface
Oscillator Frequency
YUV digital output delay
HSYNC Rising delay
VSYNC Rising delay
HSYNC Falling delay
VSYNC Falling delay
t0
t2
t5
t9
A D R [7 :0 ]
t1 0
t1 1
A D R [1 5 :8 ]
Program Memory Read Cycle Timing Diagram
Parameter
MEDIATEK CONFIDENTIAL, NO DISCLOSURE
T8
0
T6
T10
T11
T7
t1
t3
t4
t6
t7
t8
In s t.
Symbol
Min
Typ
1/T1
27
T2
T3
T4
T5
T6
27
ns
1.0Tf-5
ns
3.0Tf-20
ns
3.5Tf-20
ns
0
ns
A D R [7 :0 ]
Max
Units
MHz
15
ns
15
ns
15
ns
20
ns
20
ns
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