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ESMT
Page Read Cycle at Different Bank @ Burst Length = 4
0
1
2
C L O C K
C K E
* N o t e 1
C S
R A S
C A S
A D D R
R A a
B A 0
B A 1
A 1 0 / A P
R A a
C L = 2
D Q
C L = 3
W E
D Q M
R o w A c t i v e
( A - B a n k )
R o w A c t i v e
( B - B a n k )
Note: 1. CS can be don't cared when RAS , CAS and WE are high at the clock high going edge.
2. To interrupt a burst read by row precharge, both the read and the precharge banks must be the same.
Elite Semiconductor Memory Technology Inc.
3
4
5
6
R C c C B b
R B b C A a
R C c
R B b
QAa0
QAa1
QAa0 Q Aa1 QAa2 QBb0
R e a d
R e a d
( B - B a n k )
( A - B a n k )
R o w A c t i v e
( C - B a n k )
P r e c h a r g e
( A - B a n k )
7
8
9
10
11
H I G H
R D d C C c
RDd
QAa2
QBb2 QCc0 QCc1 QCc2 QDd0 QDd1 QDd2
QBb0
QBb1
QBb1
QBb2
R e a d
R e a d
( C - B a n k )
( D - B a n k )
R o w A c t i v e
( D - B a n k )
P r e c h a r g e
( B - B a n k )
M12L64164A
12
13
14
15
* N o t e 2
C D d
QCc1 QCc2 QDd0
QCc0
QDd1
P r e c h a r g e
( D - B a n k )
P r e c h a r g e
( C - B a n k )
Publication Date: May 2008
Revision: 3.3
16
17
18
19
QDd2
: D o n ' t C a r e
34/46
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