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MEMORY ORGANIZATION
The memory is organized as:
2,097,152 bytes
Uniform Sector Architecture
32 blocks of 64-Kbyte
512 sectors of 4-Kbyte
8192 pages (256 bytes each)
Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector,
Block or Chip Erasable but not Page Erasable.
Table 2. Uniform Block Sector Architecture
Block
Sector
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
511
1FF000
496
1F0000
495
1EF000
480
1E0000
479
1DF000
464
1D0000
463
1CF000
448
1C0000
447
1BF000
432
1B0000
431
1AF000
416
1A0000
415
19F000
400
190000
399
18F000
384
180000
383
17F000
368
170000
367
16F000
352
160000
351
15F000
336
150000
335
14F000
320
140000
319
13F000
304
130000
303
12F000
288
120000
287
11F000
272
110000
271
10F000
256
100000
255
0FF000h
240
0F0000h
Rev. F, Issue Date: 2009/03/16
Address range
1FFFFF
1F0FFF
1EFFFF
1E0FFF
1DFFFF
1D0FFF
1CFFFF
1C0FFF
1BFFFF
1B0FFF
1AFFFF
1A0FFF
19FFFF
190FFF
18FFFF
180FFF
17FFFF
170FFF
16FFFF
160FFF
15FFFF
150FFF
14FFFF
140FFF
13FFFF
130FFF
12FFFF
120FFF
11FFFF
110FFF
10FFFF
100FFF
0FFFFFh
0F0FFFh
5
©2004 Eon Silicon Solution, Inc.,
EN25F16
www.eonssi.com
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