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Power-up Timing
Table 8. Power-Up Timing and Write Inhibit Threshold
Symbol
(1)
V
(min) to CS# low
t
CC
VSL
(1)
Time delay to Write instruction
t
PUW
VWI (1)
Write Inhibit Voltage
Note:
1.The parameters are characterized only.
2. VCC (max.) is 3.6V and VCC (min.) is 2.7V
INITIAL DELIVERY STATE
The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). The
Status Register contains 00h (all Status Register bits are 0).
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
Figure 20. Enter OTP Mode
Figure 21. Power-up Timing
Parameter
23
©2004 Eon Silicon Solution, Inc.,
Rev. F, Issue Date: 2009/03/16
EN25F16
Min.
Max.
Unit
10
µs
1
10
ms
1
2 .5
V
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