Questionable Data Register Commands - Agilent Technologies 33250A User Manual

80 mhz function / arbitrary waveform generator
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Chapter 4 Remote Interface Reference
Status Reporting Commands

Questionable Data Register Commands

See the table on page 231 for the register bit definitions.
STATus:QUEStionable:CONDition?
Query the condition register in this group. This is a read-only register
and bits are not cleared when you read the register. A query of this
register returns a decimal value which corresponds to the binary-
weighted sum of all bits set in the register.
STATus:QUEStionable[:EVENt]?
Query the event register in this register group. This is a read-only register.
Once a bit is set, it remains set until cleared by this command or *CLS
(clear status) command. A query of this register returns a decimal value
which corresponds to the binary-weighted sum of all bits set in the register.
4
STATus:QUEStionable:ENABle <enable value>
STATus:QUEStionable:ENABle?
Enable bits in the enable register in this register group. The selected bits
are then reported to the Status Byte. A *CLS (clear status) will not clear
the enable register but it does clear all bits in the event register.
The STATus:PRESet command clears all bits in the enable register.
To enable bits in the enable register, you must write a decimal value
which corresponds to the binary-weighted sum of the bits you wish to
enable in the register.
The :ENAB? query returns a decimal value which corresponds to the
binary-weighted sum of all bits enabled by the STAT:QUES:ENAB
command.
236

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