Using The Message Available Bit (Mav); To Interrupt Your Computer Using Srq; To Determine When A Command Sequence Is Completed - Agilent Technologies 33250A User Manual

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Chapter 4 Remote Interface Reference
The SCPI Status System

Using the Message Available Bit (MAV)

You can use the Status Byte "Message Available" bit (bit 4) to determine
when data is available to read into your computer. The instrument
subsequently clears bit 4 only after all messages have been read from the
output buffer.

To Interrupt Your Computer Using SRQ

1. Send a Device Clear message to return the function generator to a
responsive state and clear it's output buffer (e.g., CLEAR 710).
2. Clear the event registers and error queue using the *CLS command.
3. Set up the enable register masks. Use the *ESE command to
configure the Standard Event enable register and the *SRE command
to configure the Status Byte enable register.
4. Send the *OPC? command and read the result to ensure synchronization.
5. Enable your computer's IEEE-488 SRQ interrupt.

To Determine When a Command Sequence is Completed

1. Send a Device Clear message to return the function generator to a
responsive state and clear it's output buffer (e.g., CLEAR 710).
2. Clear the event registers and error queue using the *CLS command.
3. Enable the "Operation Complete" bit (bit 0) in the Standard Event
register by executing the *ESE 1 command.
4. Send the *OPC? command and read the result to ensure synchronization.
5. Execute your command string to program the desired configuration,
and then execute the *OPC command as the last command. When the
command sequence is completed, the "Operation Complete" bit (bit 0)
is set in the Standard Event register.
6. Use a Serial Poll to check to see when bit 5 (routed from the Standard
Event register) is set in the Status Byte condition register. You could
also configure the function generator for an SRQ interrupt by sending
*SRE 32 (Status Byte enable register, bit 5).
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