Pci Local Bus Memory Map; Vmebus Memory Map - Motorola MVME2301 Installation And Use Manual

For detailed processor memory maps, including suggested CHRP-
and PREP-compatible memory maps, refer to the MVME2300-Series
VME Processor Module ProgrammerÕs Reference Guide.

PCI Local Bus Memory Map

The PCI memory map is controlled by the Raven MPU/PCI bus
bridge controller ASIC and by the Universe PCI/VME bus bridge
ASIC. The Raven and Universe devices adjust system mapping to
suit a given application via programmable map decoder registers.
No default PCI memory map exists. Resetting the system turns the
PCI map decoders off, and they must be reprogrammed in software
for the intended application.
For detailed PCI memory maps, including suggested CHRP- and
PREP-compatible memory maps, refer to the MVME2300-Series
VME Processor Module ProgrammerÕs Reference Guide.

VMEbus Memory Map

The VMEbus is programmable. Like other parts of the MVME230x
memory map, the mapping of local resources as viewed by
VMEbus masters varies among applications.
The Universe PCI/VME bus bridge ASIC includes a user-
programmable map decoder for the VMEbus-to-local-bus interface.
The address translation capabilities of the Universe enable the
processor to access any range of addresses on the VMEbus.
Recommendations for VMEbus mapping, including suggested
CHRP- and PREP-compatible memory maps, can be found in the
MVME2300-Series VME Processor Module ProgrammerÕs Reference
Guide. Figure 4-1 shows the overall mapping approach from the
standpoint of a VMEbus master.
Memory Maps
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