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Prestigio Cavaliere 141
5. Pin Descriptions of Major Components
5.3 SiS961(MuTIOL® Media I/O South Bridge )
IED Inter face
Name
Pin Attr
IDA[15:0]
I/O
Primary Channel Data Bus
3.3V/5V -M
IDB[15:0]
I/O
Secondary Channel Data Bus
3.3V/5V -M
IDECSA[1:0]#
O
Primary Channel CS[1:0]
3.3V -M
IDECSB[1:0]#
O
Secondary Channel CS[1:0]
3.3V -M
IIOR[A:B]#
O
Primary/Secondary Channel IOR# Signals
3.3V -M
IIOW[A:B]#
O
Primary/Secondary Channel IOW# Signals
3.3V -M
ICHRDY[A:B]
I
Primary/Secondary Channel ICHRDY# Signals
3.3V/5V -M
IDREQ[A:B]
I
Primary/Secondary Channel DMA Request Signals
3.3V/5V -M
IDACK[A:B]#
O
Primary/Secondary Channel DMACK# Signals
3.3V -M
IIRQ[A:B]
I
Primary/Secondary Channel Interrupt Signals
3.3V/5V -M
IDSAA[2:0]
O
Primary Channel Address [2:0]
3.3V -M
IDSAB[2:0]
O
Secondary Channel Address [2:0]
3.3V -M
CBLID[A:B]
I
Primary/Secondary Ultra-66 Cable ID
3.3V/5V -M
Legacy I/O and Miscellaneous Signals
Signal Name
Pin Attr
SPK
O
Speaker output:
3.3V -M
The SPK is connected to the system speaker.
ENTEST
I
SiS961 Test Mode Enable Pin
3.3V/5V -M
OSCI
I
SiS961 Test Mode Enable Pin
3.3V -M
Signal Descr iption
Signal Descr iption
Power Management Inter face
Name
Pin Attr
ACPILED
OD
ACPILED :
<=5V -AUX
ACPILED can be used to control the blinking of an LED at the
frequency of 1Hz to indicate the system is at power saving
mode.
EXTSMI# /
I
Exter nal SMI#:
GPIO3
I/O
EXTSMI# can be used to generate wakeup event, sleep event, or
3.3V/5V -M
SCI/SMI# event to the ACPI compatible power management
unit.
PME#
I
PME# :
3.3V/5V -AUX
When the system is in power-down mode, an active low event
on PME# will cause the PSON# to go low and hence turn on the
power supply. When the system is in suspend mode, an active
PME# event will cause the system wakeup and generate an
SCI/SMI#.
PSON#
OD
ATX Power ON/OFF contr ol:
<=5V -AUX
PSON# is used to control the on/off state of the ATX power
supply. When the ATX power supply is in the OFF state, an
activated power-on event will force the power supply to ON
state.
AUXOK
I
Auxiliar y Power OK:
3.3V -AUX
This signal is supplied from the AUX power source. It is also
used to reset the logic in AUX power well. If there is no
auxiliary power source on the system, this pin should be tied
together with PWROK.
PWRBTN#
I
Power Button:
3.3V/5V -AUX
This signal is from the power button switch and will be
monitored by the ACPI-compatible power management unit to
switch the system between working and sleeping states.
RING /
I
Ring Indication:
GPIO8
I/O
An active RING pulse and lasting for more than 4ms will cause
3.3V/5V -AUX
a wakeup event for system to wake from S1~S5.
BCLK_STP#
O
Stop CPU clock:
GPIO12
I/O
Output to the external clock generator for it to turn off the CPU
3.3V/5V -AUX
clock during C3/Sx.
DPRSLPVR
O
Deeper Sleep:
GPIO13
O
DPRSLP# can be used to lower the Intel processor voltage
3.3V/5V -AUX
during C3/S1 state.
86
Technical Service Manual
Signal Descr iption
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