Chapter 3
Timing Diagrams
ACK
REQ
Output Data Valid
(REQ-edge
latching disabled)
Output Data Valid
(REQ-edge
latching)
Parameter
Input Parameters
t
REQ pulse width
rr*
t
REQ inactive duration
r*r
t
ACK to next REQ
ar
Output Parameters
t
ACK pulse width
aa*
REQ inactive to new output data
t
r*do
(with REQ-edge latching)
t
REQ to new output data
rdo
(with REQ-edge latching disabled)
t
Output data valid to ACK
doa
(with REQ-edge latching disabled)
1
t
(min.) = 125 + programmable delay
aa*
With REQ edge latching disabled (default), output data valid will hold t
Note
the REQ edge with REQ edge latching enabled, that data will be held for at most t
after the REQ edge deasserts.
653X User Manual
t
aa*
t
ar
t
r*r
t
doa
Description
Figure 3-37. Long Pulse Output Timing Diagram
3-40
t
rr*
t
rdo
t
r*do
ACK and REQ are shown as active high
Minimum
75
75
0
1
125
0
0
25
Maximum
—
—
—
—
50
—
—
ns after
rdo
ns
rdo
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