National Instruments 653X User Manual page 89

High-speed digital i/o devices for pci, pxi, compactpci, at, eisa, and pcmcia bus systems
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Chapter 3
Timing Diagrams
With REQ edge latching enabled (default) REQ edge determines when data will be
Note
latched. Input data valid has to be held before active going REQ edge a minimum of t
With REQ edge disabled, it has to be held t
occurs.
Initial State
Reference
Point
Initial State
ACK is deasserted.
1
The 653X device sends an ACK pulse with programmable width to indicate that
it has data to output. Assuming the peripheral device has deasserted the REQ
signal. Otherwise, the ACK signal remains asserted until the peripheral device
deasserts the REQ signal.
2
The peripheral device can latch the data on the rising or falling edge of the ACK
pulse, or anytime before asserting the REQ signal.
3
Once the data is latched, the peripheral device must respond with an active-going
REQ signal edge.
653X User Manual
1
ACK
REQ
Figure 3-35. Long Pulse Output Handshaking Sequence
after the next active going ACK signal edge
adi
2
*
3
ACK and REQ are shown as active high.
Steps 1-3 are repeated for each transfer.
= programmable pulse width
*
Action Steps
3-38
ns.
rdi
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