If you are using long cables, slow down the PCLK clock signal to compensate for the
Tip
decrease in data setup time.
© National Instruments Corporation
The 653X device can either drive an output clock signal onto the PCLK line
or receive an input clock signal from the PCLK line. By default, the PCLK
line is set for input during output transfers, and set for output during input
transfers.
3-7
Chapter 3
Timing Diagrams
653X User Manual