Raytheon DIDS-400 Series Manuals

Manuals and User Guides for Raytheon DIDS-400 Series. We have 1 Raytheon DIDS-400 Series manual available for free PDF download: Technical Manual

Raytheon DIDS-400 Series Technical Manual

Raytheon DIDS-400 Series Technical Manual (268 pages)

DIGITAL INFORMATION DISPLAY SYSTEM TERMINAL

Brand: Raytheon | Category: Touch terminals | Size: 36.66 MB

Table of Contents

Section 1

4
- Table of Contents
  4
Section 2

10
- Chapter 1. General Information
  
  14
  - Purpose of Equipment
    14
  - Description of Equipment
    14
  - Keyboard Assembly All
    16
  - Display Logic Board a
    16
  - Communications Control Board A12
    16
  - Tim.ing and Discrete Board a
    16
  - Delay-Line Electronics A9
    16
  - Monoscope
    16
  - Model 402-2AM13 Keyboard
    17
  - Video Pream.plifier A7
    22
  - Video Am.plifier A8
    22
  - Low Voltage Power Supply A4
    23
    
    Model 402-2AM13 Display Terminal, Rear View
    23
  - High Voltage Power Supply as
    24
  - Cathode Ray Tube (CRT) V2
    24
  - Information and Reference Tables
    24
  - Leading Particulars
    24
  - Capabilities and Lim.itations
    25
    
    Leading Particulars
    25
  - Wiring Options
    26
  - Glossary of Terms
    27
- Chapter 2. Installation and
  
  34
  - Siting Requirements
    34
  - Location
    34
  - Prim.ary Power Requirem.ents
    34
  - Installation Procedure
    35
  - Receipt and Unpacking of Equipm.ent
    35
  - Cable Requirem.ents
    35
  - Cable Fabrication
    35
  - Preoperational Procedures
    35
  - Visual Checkout
    35
  - Resistance and Voltage Measurem.ents
    36
  - Ahgnm.ent and Adjustm.ents
    37
  - Turn-On Procedure
    37
  - Delay-Line Adjustm.ent
    38
  - Video Am.phfier A8
    40
    
    Delay-Line Adjustment
    40
  - Monoscope Deflection Am.phfier A3
    41
  - Monoscope Deflection Amplifier Adjustments
    43
  - Reassembly
    44
  - Horizontal and Vertical Deflection Amplifier Adjustments
    45
- Chapter 3 . Opera Tion
  
  46
- Chapter 4 . Theory of Operation
  
  54
  - Preoperational Procedure S
    53
  - Turn-On Procedure
    53
  - Description of Section Contents
    54
  - Introduction
    54
    
    Functional Operation
    54
    
    Section I
    54
  - System Description
    54
  - System Operation
    55
  - Addre S S Options
    56
  - Optional Communication Channel
    56
  - Optional Conversational Modes
    56
  - Optional Operation
    56
  - Transm.it Options
    56
  - Cursor Option
    57
  - Interface Characteristics
    57
  - Receive Options
    57
  - Clear-To-Send
    58
  - Ground
    58
  - Received Data
    58
  - Request-To-Send
    58
  - Transmitted Data
    58
  - Conversational Modes
    59
  - Transm.it/Receive Conditions
    59
  - Character Representation
    60
  - Enquiry -Re Sponse
    60
  - Polling
    60
  - Character Format
    61
    
    ASCII Matrix
    61
  - ASCII Control Codes
    62
  - Message Format
    64
  - Enquiry Format
    65
  - Message Format, Enquiry-Response
    65
  - Response Form.at
    65
  - Action of ASCII Control Codes During Receive
    66
  - Polling Message Format
    68
  - Polling Read Directive
    68
  - Polling Write Directive
    69
    
    Display Terminal Response to Read Directive if
    69
  - Polling ENQ Directive
    70
    
    Functional Description
    71
  - Character Generation and Refresh
    71
  - General Description of Section Contents
    71
  - Keyboard-Monoscope Circuits
    71
  - Overall Block Diagram
    71
  - Character Entry Register
    72
  - Character Readout Register
    72
    
    Model 402-2AM13 Display Terminal, Overall Block Diagram
    72
  - Character Entry and Readout Registers and Refresh
    74
  - Keyboard Characters and Coding
    76
  - Delay Line a IS
    85
    
    Delay-Line Memory Section, Simplified Diagram
    85
  - Delay-Line Electronics A9
    85
  - Buffer Registers and Interface
    86
  - Buffer Registers and Interface
    87
  - Receive Mode
    88
  - Transrn.it Mode
    88
  - Editing and Cursor Control Logic
    89
  - 88-Count Register
    90
  - Individual Function Flip-Flops
    90
  - Input and Output Display Logic
    90
  - Insert and 12-Count Register
    90
  - Editing and Cursor Control Logic, Block Diagram
    91
  - Master Oscillator
    95
  - Minor Vertical Expansion
    95
  - Phase Counter
    95
  - Bit Counter
    96
  - Character Counter
    97
  - Eight-Character Counter
    97
  - 1200-Baud Circuitry
    98
    
    Character Counter Outputs
    98
  - 12-Hz Oscillator
    99
  - Raster Generation
    99
  - Vertical and Horizontal Deflection Amplifier, Block Diagram
    100
  - Minor Vertical Expansion Signal
    101
    
    Effect of Minor Ver.ticalexpansion on CRT Scan Lines
    101
  - Low- Voltage Power Supply A4
    102
  - Circuit Description
    104
  - Description of Section Contents
    104
  - Enquiry Re Sponse
    105
    
    Dids-402 -2Am
    105
  - Transrn.it Enable
    105
  - Transmit Enable Circuitry
    106
    
    Polling
    108
    
    Optional Operation
    109
    
    Request-To-Send and Clear-To-Send
    109
    
    One-Step Transmit
    110
  - One-Step Transmit Option, Logic Diagram
    111
    
    Enquiry Option
    112
    
    Enquiry-Re Sponse
    113
    
    Receive-Enable
    113
  - Receive Enable Circuitry, Logic Diagram
    114
    
    Polling
    115
    
    Parity Check and Generation
    116
  - Receive
    116
    
    Parity Check and Generation, Logic Diagram
    117
    
    Transmit
    117
    
    Buffer Register Control Logic
    118
  - Busy-Bit Flip-Flops
    118
  - SDL, D3 Gate and Associated Circuits, Logic
    120
  - Busy-Bit One
    121
    
    Busy-Bit Two
    121
  - Busy-Bit Three
    121
    
    Shift Gate Two-To-Three (SG23)
    122
    
    Shift Gates
    122
    
    Receive Mode - Text Characters
    123
    
    Shift (To/From) Delay Line (SDL)
    123
    
    Receive Mode - Control Characters Not Pre- Ceded by ESC
    124
    
    Buffer Registers
    128
  - Buffer Registers. Block Diagram
    129
    
    Buffer Register Dl
    130
  - Buffer Register DI. Logic Diagram
    131
    
    Buffer Register D3, Logic Diagram
    136
    
    Flip-Flops
    139
    
    BELL, and NULL Decodes
    140
    
    Character Entry Register
    142
    
    Display Logic Board A13
    142
  - Data from Delay Line
    142
    
    Data from Keyboard
    144
    
    Data from Buffer Register D3
    145
    
    Data to Buffer Register Dl
    145
    
    Decodes
    146
    
    Character Readout Register 4 -1 01/4 - 1
    148
    
    Display Functions
    150
  - Display Functions Control, Logic Diagram
    151
  - Step Right Function. Logic Diagram
    153
  - Step Left Function, Logic Diagram
    155
  - Cursor Reset Function, Logic Diagram
    159
  - Erase Line Function, Logic Diagram
    162
  - Erase Message Function, Logic Diagram
    163
  - Step-Down Function, Logic Diagram
    170
  - Step-Up Function, Logic Diagram
    172
  - Delete Function, Logic Diagram
    176
  - Logic Diagram
    179
  - Minor Vertical Sweep, Logic Diagram
    179
  - Minor Vertical Sweep and Phase Counter, Timing Diagram
    180
  - Phase Counter, Logic Diagram
    180
  - Bit Counter, Timing Diagram
    182
  - Eight-Character Counter, Logic Diagram
    182
  - Eight -Character Counter, Timing Diagram
    183
  - Character Counter, Logic Diagram
    184
  - Character Counter, Timing Diagram
    185
  - 1200-Baud Circuitry, Logic Diagram
    190
  - Cursor Video, Logic Diagram
    193
  - Blanking Circuit, Logic Diagram
    194
  - Monoscope and High Voltage Network, Schem.atic Diagram
    200
  - Integrated Circuits, Logic Diagram
    207
  - Analog Microminiature Circuits, Schematic Diagram
    208
  - Inverter /Driver Function, Logic Diagram and Truth Table
    210
  - Edge-Triggered Flip-Flop, Logic and Timing Diagram and Truth Table
    211
  - J -K Master -Slave Flip-Flop, Logic Diagram and Truth Table
    212

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