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DIDS-402 -2AM13
from 0 to 16 ms later to enable NAND-gate A23. 8 and AND-gate AS6. 8.
On the
following 4( CTS+1), SDL is set to simultaneously enable clock pulse s to D3 and
to enable resetting D3 GATE.
l(CTS+1) sets D3 GATE and produces a CRQ from
NAND-gate A24. 12.
D3 GATE enables NAND-gate A2S. 6 and CRQ performs a
step-right function.
On the next 03, seven clock pulses are applied to buffer
register D3 and the character is serially shifted into the delay line (via the
character entry register).
If a character is sim.ultaneously shifted into D3 by SG23, CRQ enables a
successive transfer into the delay line.
This is possible because the cursor
automatically appears at the inputs of A23.
8
and AS6.
8
to enable setting SDL.
4-22.4.2.3.2 Receive Mode - Control Characters When Preceded by
ESC.
When control characters are received from the CPU, the specific operation
performed by the Display Terminal depends upon whether or not ESC preceded
the control character.
When ESC precedes a control character, the character
code is stored in m.em.ory and the operation associated with the code is not
perform.ed.
This is accom.plished in the followingm.anner.
When an ESC control code enters D3 in the receive m.ode, the ESC decode
(see paragraph 4-22.4.4) produces an output during 4(CTS+l).
This output
sim.ultaneously jam.s SDL and BB3 to reset.
The com.bined effect of these two
operations is to inhibit shifting ESC into the delay line and to enable SG23 to
shift another character into D3 'on-top-of' the ESC character.
In
addition, the
output from. the ESC decode is used to clock the ESC flip-flop to a set condition.
When the ESC flip-flop is set, all control character decode s are inhibited and
the CCC flip-flop (point B) rem.ains re set.
When the character following ESC is shifted into D3, it is treated the
sam.e as a text character since all D3 decodes are inhibited.
The cursor is
located and the character code contained in D3 is serially shifted into the
delay line via NAND-gate A2S. 6.
.
To briefly sum.m.arize, the reception of ESC results in setting. the ESC
flip-flop.
The output of the ESC flip-flop is in turn used to inhibit the control
character decodes connected to D3.
Since the control character cannot be
recognized, it is treated the sam.e as text and perm.itted to enter the delay-line
m.emory.
4-22.4.2.3.3 Receive Mode - Control Characters Not Preceded by ESC.
When any control character except LF, ENQ, BELL, and NULL is shifted into
D3 without being preceded by ESC, the applicable decode is enabled since the
ESC flip-flop is not set.
This permits the edit or cursor control function
as sociated with the code to be perform.ed.
With the exception of the code s listed
above, the decode output results in sim.ultaneously setting the CCC flip-flop,
perform.ing the specified function (such as step up, erase, etc),
~nd
clearing
BB3.
When point B goes low as a result of setting the CCC flip-flop, the SDL
circuitry is disabled for as long as it takes to com.plete the function.
After
the function has been com.pleted, the ,CCC flip-flop is reset to once again enable
4-76
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