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DIDS-402 -2AM13
with the delay line to form a loop, one character is always pre sent in the CE
register for display •. When a complete character has been shifted into the CE
register, a pulse enables the character code to be parallel-transferred into the
character readout (CR) register for displaying a corre sponding visual character
on the CRT screen.
Data characters circulating in the refresh memory consist of eight bits.
These eight bits contain seven data bit positions which are used to carry
character code information; the eighth bit position is reserved for the cursor.
When the cursor is attached to a character code, the cursor bit position contains
a 111.
Conversely, if the character code does not have the cursor attached,
the cursor bit position is '0 ' •
The cursor bit is moveable and can be attached
to only one of the 1040 data characters held in the delay line.
Data from the delay line enters the CE register at the input to register
flip-flop A56. 5 after passing through the output display logic.
Clock pulses are
constantly applied to the CE register, providing an uninterrupted stream of
serial data constantly circulating through the register.
Since data is transferred
LSB first, the cursor bit position is the first portion of a character to enter the
register.
This bit is clocked into A56. 5 during 2(CTS) so that during the period
2(CTS) through 2(CTS+1) the cursor bit is held by flip-flop A56. 5.
The next
seven successive phase 2 pulses shift the character into the register and after
eight bit times, "a complete character is held in the register.
It is during this
time (2CTS) that a non volatile transfer places the character code into the
character readout (CR) register.
Data exits the CE register from set output A62. 9 and is coupled to the
delay line via the input display logic.
After a character enter s the delay line,
it
is returned to the CE register after a delay of 16.026 ms.
This time interval
corre sponds to the frame time, or the time required for the CRt scan to leave
a particular position on the screen, move through an entire scan of the screen,
and return to the original position on the screen.
Since the character code will
once agai:r:l be transferred to the CR register, 'the visual character displayed on
the CRT screen will be refre shed •
.
4-23.1.2 Data from Keyboard
The CE register enables display terminal operators to enter keyboard
information into the refre sh memory loop.
Each time the operator depre s se s
a character key, a 7 -bit digital code and an INTERLK pulse are produced.
The 7-bit code is peculiar to the particular key depressed, while INTERLK is
present every time a character key is depressed.
Assuming that the 'A' key is depressed, the code present at the inputs to
the strobe gates is 1100001.
This code is present at the input to each gate for
as long as the key is held depressed (usually 20 to 50 ms).
The INTERLK input to flip-flop A33. 6 is normally high; this holds the flip-
flop set.
The depression of any character key causes a high-to-low level change
and enables the display logic clock (see paragraph 4-23.3.1).
The first F(.6.) that
occurs after key depression develops a PB3 clock pulse to reset the flip-flop.
A33.6 remains reset until the cursor is located in memory and a step-right
function is accomplished.
4-99
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