Buffer Registers And Interface - Raytheon DIDS-400 Series Technical Manual

DIDS-402-2AM13
Data bits, in pulse form, are coupled from the first write amplifier and
enter the top delay-line section at the input transducer. The transducer converts
electrical energy to mechanical energy which is used to push one magnetostrictive
tape while pulling the other. The back and forth movement of the magnetostrictive
tape s twists the input end of the transmis sion wire. This twisting motion travels
down the transmission wire at a rate of
9
IJ.s/in. and is present at the opposite
end of the wire after a certain delay in time.
At the output end of the transmission wire, the twisting movement moves
a second pair of magnetostrictive tapes which couple mechanical movement to
the output transducer. The output transducer converts this mechanical energy
to electrical energy, and the original data bit is reproduced. The total delay
encountered by the pulse while traveling from the input to the output is approxi-
mately equal to 8.013 ms.
From the output transducer, data bits are amplified by the read section
of the first read-write amplifier and coupled to the second write-amplifier. From
this point, the same circuit action previously described occurs and a second
8. 013-ms delay is encountered. Thus, a total of 16. 026-ms delay is encountered
in the delay-line portion of the refresh memory. This delay corresponds to the
CRT frame time.
4-16 BUFFER REGISTERS AND INTERFACE
The buffer registers and their associated interface circuits are shown in
figure 4-16. These registers provide a buffer between the high-speed refresh
memory and the relatively slow speed CPU interface circuits.
The buffer registers perform the following major functions.
In the transmit mode:
Generate STX and DA in D2 and D3 to initialize the transmitted
message
Provide a temporary storage of memory data so that a smooth
transmission of data at 1200 baud is possible
In the receive mode:
Provide a means to decode numerous control codes and message
initialization and termination characters
Provide a means for cancelling characters received with improper
parity
Operation of the buffer registers during transmit and receive modes is
described below.
4-35