Banner SCR P Series Instruction Manual page 39

Virtual Reset or Cancel Delay (RCD) Sequence—Feedback Method
1. Write a logical 1 to the RCD Register Bit(s) corresponding to the desired Virtual Reset or Cancel Delay.
2. At the same time, or any time later, write the Actuation Code to the RCD Enable Register.
3. Monitor the RCD Enable Feedback Register for the Actuation Code to appear (125 ms typical). Then write a
logical 0 to the RCD Register Bit.
4. At the same time, or any time later, clear the Actuation Code (write a logical 0 to the RCD Enable Register).
This step must be completed within 2 seconds of when the code was first written (step 2).
5. If desired, monitor the RCD Feedback Register to know if the desired Reset or Cancel Delay was accepted
(175 ms typical).
Note: An AOI and PLC function block are available at
Virtual Reset or Cancel Delay (RCD) Sequence—Timed Method
1. Write a logical 1 to the RCD Register Bit(s) corresponding to the desired Virtual Reset or Cancel Delay.
2. At the same time, or any time later, write the Actuation Code to the RCD Enable Register.
3. At least 125 ms after step 2, write a logical 0 to the RCD Register Bit.
4. At the same time, or any time later, clear the Actuation Code (write a logical 0 to the RCD Enable Register).
This step must be completed within 2 seconds from when the code was first written (step 2).
5. If desired, monitor the RCD Feedback Register to know if the desired Reset or Cancel Delay was accepted
(175 ms typical).
Figure 16: Virtual Reset or Cancel Delay (RCD) Sequence—Feedback Method
Figure 17: Virtual Reset or Cancel Delay (RCD) Sequence—Timed Method
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