Zenith Z-100 PC series Service Manual page 96

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Page
4-10
Detailed Circuit Description
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T3
SO,S
1
S2
INVALID
1 ClK CYCLE
A O - A 8 , FROM HERE
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,
_ ______________
~~10ns ~10ns
L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
~ 10ns~
IOW*
I I ,
00- D 7 - - - - - - - - - - : - ,
~~--::5-::0-n-s~ ,~
20 n s
GCPU-------------~~I
,
L-­
----, 60
~30ns
GM*
-----------.:-~......,
n s
r
I~------------------------------------------~
'20ns '",,20ns
----.J
~-~~------------------------------------------------~L
DT/R*
5MHz
'~40170ns '~50
ns
SO*-S2*--rJL~----~------------------~I~---------------~
1~60ns !~
20ns
---.J ,
ALES
AO-A8----~ ~10ns
10 W* - - - - - - - - - - - - . ,
I
L.,--.~--:-1-::-1':::'o-n':""s---------------...J
'--::cl80ns
DO-D7-----------------~1 ,~
1~~8~O~n~s--------------------~~20ns
J
I
G CPU - - - - - - - - - - - - - - - - - - '
'~';-3;:-o;:-n-s~---
GM*------------------~
,
~10ns ~------------------------------' ~10ns
rl~~----------------------------------------~j
L. _
DT/R*~
1,llf
Figure 4-5: I/O Write Timing
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