Zenith Z-100 PC series Service Manual page 24

Table 3.1 (Continued).
PIN SIGNAL
B7 -12VDC
B8 N.C.
B9
+12VDC
B10 GND
B11 MEMW*
B12 MEMR*
B13 10W*
B14 10R*
B15 DACK3*
B16 DRQ3
B17 DACK1*
B18 DRQ1
B19 DACKO*
B20
ClK
B21 IRQ7
B22
IRQ6
Page
3.5
Detailed Circuit Description
1/0
Bus Signal Names
DEFINITION
-12VDCbus
No connection
+12VDCbus
Ground
Memory write. When low, causes data on data bus to be
stored in memory.
Memory read. When low, causes memory to drive data onto
the data bus.
liD
write. When low, instructs an I/O device to read the data
on the data bus.
I/O read. When low, instructs an I/O device to drive its data
onto the data bus.
DMA acknowledge 3. Assigned to the Winchester drive controller.
DMA request 3. Assigned to the Winchester drive controller.
DMA acknowledge 1 . Not used. Available for user
assignment.
DMA request 1. Available.
DMA acknowledge O. Assigned to timer #1. Initiates memory
refresh cycle.
System clock 4.77 MHz.
Interrupt request 7. Assigned to parallel interface.
Interrupt request 6. Assigned to floppy disk controller.
Continued ...