Zenith Z-100 PC series Service Manual page 261

Page
3.14
Circuit Description
screen. The VSYNC pulse always has a duration of 16 scan lines.
Since the scan line frequency will vary from one application to another,
and since the VSYNC pulse duration cannot be changed, external
circuitry may be needed to achieve a pulse that is compatible with
the CRT monitor being used.
The interlace mode register, RS, determines whether interlaced or non­
interlaced scan is used.
The value in register R9 determines the number of scan lines per
character row. This 5-bit register may be programmed for a character
row of up to 32 scan lines. The value used will dictate the maximum
count output by the raster address signals (RAO through RA4) to the
character generator logic. Load R9 with the desired scan line count
minus 1.
The cursor formatting registers are comprised of the cursor start
and cursor stop registers, R10 and R11, respectively. The five least­
significant bits of each register determine the scan lines within a char­
acter row where the cursor symbol is to be activated. The scan line
specified in R10 is the first scan in which the CURSOR signal is to
be set and it will remain set until the scan line specified in R11 has
been completed. Accordingly, if the cursor symbol is to occupy a single
scan line, the same value must be loaded into both registers. If different
values are loaded, a block-type cursor will be formed. In interlaced
sync and video mode, both registers must be loaded with either odd
or even values. Bits 5 and 6 determine whether or not the cursor
is to blink, and if so, at either 1Ae th or
1/32th
of the field rate.
• Primary Operating Registers - The remaining six registers, R12
through R17, are considered the primary operating registers since,
in the course of display programming, the contents will be changed
on an ongoing basis rather than being loaded one-shot at system start­
up. The six registers are arranged as three 14-bit register pairs (bits
6 and 7 of the most-significant byte are not used).
R12 and R13 comprise the top-of-page register which specifies the
screen memory address containing the first character from the top-left
corner to be displayed. At the end of each vertical retrace, the first
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