Zenith Z-100 PC series Service Manual page 88

Page
4-2
Detailed Circuit Description
The microprocessor has l6-bit internal architecture for all registers,
internal data paths, instruction codes, and the ALU. It communicates
with the rest of the computer system using 8-bit data lines. Twenty
address outputs provide over 1,000,000 possible memory address
locations and 64,000 I/O address locations.
The memory is processed internally by the 8088-2 as 16 segments of 64K
each. This is possible because the microprocessor uses two separate
registers to store the memory address. A 4-bit register, called the segment
register, defines the most significant 4 bits of the address. The lower 16
bits of the address are stored in a separate register.
Table 4-1: 8088-2 Microprocessor Signals
PIN SIGNAL
NUMBER NAME DESCRIPTION
GND Ground for the 8088-2 microprocessor (U235).
2-8,39
A8-A15
Middle-order address lines.
9-16 ADO- AD7 These signals are used for both the data bus
and the first eight bits of the address bus. At
the beginning of an instruction cycle, they are
used for the low-order address. Later, these
signals are used for data (refer to The
Instruction Cycle section in this chapter).
17 NMI Used by the gate array (U248) to inform the
microprocessor of a nonmaskable interrupt. A
low-to-high transition in this signal will
direct the microprocessor to a specific loca­
tion in the program instructions (refer to the
Interrupt Operation section in this chapter).
18 INTR
Used by the interrupt controller (U240) to
inform the microprocessor of a maskable
interrupt. When the interrupt is acknowl­
edged, the interrupt controller supplies the
microprocessor with the address of the
programming instructions for the interrupt
(refer to the Interrupt Operation section in
this chapter).
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