Intel iSBC 432/100 Hardware Reference Manual page 26

Processor board
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iSBC 432/100
CHARACTER Lti'llGTH
0
1
0
1
0
0
1
1
5
6
7
a.
BITS
BITS
BITS
BITS
' - - - - - - - - - - PARITY ENABLE
11=ENABLEI
IO=DISABLEI
' - - - - - - - - - - - - EVEN PARITY GENERATION/CHECK
1 =EVEN
0 =OOD
EXTERNAL SYNC DETECT
1
=
SYNDET IS AN INPUT
O=SYNDET IS AN OUTPUT
SINGLE CHARACTER SYNC
l=SINGLE SYNC CHARACTER
O= DOUBLE SYNC CHARACTER
NOTE IN EXTERNAL SYNC MODE. PROGRAMMING DOUBLE CHARACTER
SYNC WILL AFFECT ONLY THE Tx
Figure 3-1. USART Synchronous Mode
Instruction Word Format
111820-s
SYNC
CHAR 1
RECEIVE FORMAT
SYNC
CHAR 1
CPU BYTES 15 8 BITS'CHARI
DATA CHARACH RS
. . . . _ _ _ _ _ . . , . )
1 - - 1 _ _ _ _ . . . .
ASSEMBLED SERIAL DATA OUTPUT ITxDI
SYNC
CHAR 2
DAT A c H
~JR~,_
A_c_T_E _Rs _ _ _ ....
SERIAL DATA INPUT iRxDI
SYNC
CHAR 2
DATA CHARACTERS
CPU BYTES 15 8 BITS CHARI
DATA
CHl~l;ACTERS
Figure 3-2. USART Synchronous Mode
Transmission Format
111820-1
1 1
Programming Information
c
BAUD RATE FACTOR
0
1
0
1
0
0
1
1
SYNC
llXI
116XI
164XI
MODE
CHARACTER LENGTH
0
1
0
1
0
0
1
1
s
6
7
8
BITS
BITS
BITS
BITS
' - - - - - - - - - -
~~~l~~:L~ABLOE~
DISABLE
' - - - - - - - - - - - - EVEN PARITY GENERATION.CHECK
1=EVEN
O•ODD
NUMBER OF STOP BITS
0
1
0
1
0
0
1
1
INVALIO
1
,.
2
BIT
BITS
BITS
(ONLY EFFECTS TX; RX NEVER
REQUIRES MORE THAN ONE
STOP BIT)
.Figure 3-3. USART Asynchronous Mode
Instruction Word Format
111820-8
GENERATED
TRANSMITTER OUTPUT
Do D1----Dx
BY 8251A
I
START
BIT
DATA BITS
PARITY
BIT
ST~
BITS
L
RECEIVER INPUT
DoD1----Dx
DOES NOT APPEAR
ON THE DATA BUS
RXD
---i
STARTT
~
i
t
B~IT_Si"'----P-A-Rl_T_Y--S"""'T6;1
~
BIT
BITS
L
- , -
PROGRAMMED
CHARACTER
LENGTH
TRANSMISSION FORMAT
START
BIT
CPU BYTE 15 8 BITS/CHARI
DATA
C~~RACTER
ASSEMBLED SERIAL DATA OUTPUT ITxDI
DATA CHARACTER
PARITY
BIT
BITS
STOD
..... _ _ _ _ ...._ _ _ _ ...... _ - !
RECEIVE FORMAT
SERIAL DATA INPUT IRxDI
.._s_T_~_~_T__..
_ _ _
D_A_TA_c_H-4ARA~-CT_E_R
_ _
..._P_A_:_1~_y__...__s
......
~~~
CPU BYTE 15 8 BITS/CHARI"
: I
DATA
CHA~ACTER
'NOTE IF CHARACTER LENGTH IS DEFINED AS 5. 6 OR 7
BITS T+tE UNUSH>BHS ARE SET TO "lEAO"
Figure 3-4. USART Asynchronous Mode
Transmission Format
111820-e
3-3

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