Panasonic UF-890 Service Manual page 239

Dial Pulse Generator
The circuit consists of the CML relay, PLS relay and their peripheral circuits. This circuit generates dial
pulses. The CPU on the FCB PC Board controls all dial pulse generation sequences. It turns relay CML
and PLS ON and OFF through the DZZSP58025 (IC60). The status of the relays during dialing is shown
below. When the absence of the terminating message is confirmed by the Off-Hook detector, the CPU
turns CML relay ON to develop loop status (DC loop). After a few seconds, the CPU turns the PLS relay
On and Off to generate dial pulses, making and breaking the loop.
Dial Pulse
CML Relay
PLS Relay
Line release
Line status
break
make
break
make
Speech
condition
break
Prepause
make
First Speech
digit condition
Inter-digit
pause
239
Second
Speech
digit
condition