Panasonic UF-890 Service Manual page 234

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CCD Drive Clock Generator Circuit

This circuit is also contained in IC9. Its function is to generate FSG, FCK1 and FR clock signals, which are

required for driving the CCD. These clock signals are generated by the system clock generator circuit

derived from the 25.0 MHz clock signal that is input to IC160. Its timing chart is shown below.The FSG,

FCK1, FCK2, FR and FSH clock supplied to the CCD is output from the OFSG, OFCK1, OFCK2, FR and

FSH of IC40 (DZZAC000108). These clocks of IC40 are derived from the FSG, FCK1, and FR clock of

IC160 (MN86075) generates the timing of the FSG, FCK1, FCK2, FR and FSH clock to drive the CCD.

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