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Appendices
FC-PGA (Flip Chip-Pin Grid Array)
FC means Flip Chip, while FC-PGA is a new package of Intel for
Pentium III CPU. It is compatible with SKT370 socket, but requires
mainboard to add some signals on socket 370.
Flash ROM
Flash ROM can be re-programmed by electronic signals. It is easier
for BIOS to upgrade by a flash utility, but it is also easier to be in-
fected by virus. Because of increase of new functions, BIOS size is
increased from 64KB to 256KB (2M bit) or more.
FSB (Front Side Bus)
FSB is the data channel connecting the Processor to chipset, RAM,
mainboard buses, AGP socket etc. Its speed is in terms of MHz and is
talked to as FSB clock:
FSB Clock means CPU external bus clock.
CPU internal clock = CPU FSB Clock x CPU Clock Ratio
IEEE 1394
IEEE 1394 is a low-cost digital transfer interface with transfer rate at
100, 200 or 400 Mbps. It provides solutions of connecting digital tele-
vision devices and Serial Bus Management. There are two type of IEEE
1394 data transfer: asynchronous and isochronous. Isochronous data
channels provide guaranteed data transport at a pre-determined rate.
This is especially important for time-critical multimedia data where
just-in-time delivery eliminates the need for costly buffering.
NVRAM
Non-volatile RAM does not lose data even if the power is off. it is
much slower yet much more expensive than standard memory.
Parity Bit
The parity bit mode of error detection uses 1 parity bit for each byte.
Normally it is even parity mode, that is, each time the memory data is
updated, parity bit will be adjusted to have even count "1" for each
byte. Next time when memory is read with odd number of "1", the
parity error is occurred and this is called single bit error detection.
PC-100 DIMM
SDRAM DIMM that supports 100MHz CPU FSB bus clock.
PC-133 DIMM
SDRAM DIMM that supports 133MHz CPU FSB bus clock.
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