Intel Xeon LV User Manual page 46

Table 17. Jumper Block Locations (Sheet 2 of 3)
Location Jumper/Header Name
NN Intruder Detect Header
R CPU_GTLREF Header
Processor Thermal Diode
L
Header
®
Intel 3100 Chipset Thermal
K
Diode Header
P Processor BPM0 Inject Header
O Processor BPM3 Inject Header
V Stop Clock Inject Header
®
Intel 3100 Chipset DDR V
I
Header (validation Only)
®
Intel 3100 Chipset FSB Vref
U
Header (validation Only)
DDR DIMM Vref Header
J
(validation Only)
II Wake Event Header
BB VSBY SMBUS Segment Header
EE PCI SMBUS Segment Header
Z IMCH SMBUS Segment Header
Dual-Core Intel® Xeon® Processor LV and Intel
User's Manual
46
Ref Des
J3B2
J7H2
J9F2
Access to Intel
J9F1
J9J1 1: CPU_BPM0 input (apply 3.3 V here)
J9H4 1: CPU_BPM0 input (apply 3.3 V here)
J5G1 1: IMCH_STPCLK_N input (apply 3.3 V here)
REF
J7C1
J7G1
J7C2
J4D1
J2G6
J2G5
J2G3
®
3100 Chipset
Description
Optional Intruder Switch Header
1: MICH_INTRUDER HDR_N
2: GND
Access to CPU_GTLREF
1: Ground
2: CPU_GTLREF
Access to CPU Thermal Diode
1: CPU_THRM_DC
2: CPU_THRM_DA
3: Ground
®
3100 Chipset Thermal Diode
1: MICH_THRM_DC
2: MICH_THRM_DA
3: Ground
Inject CPU BPM0 Signal
2: Ground
Inject CPU BPM3 Signal
2: Ground
Inject IMCH_STPCLK_N Signal
2: Ground
Access to DDR V
REF
1: DDR_MICH_VREF
2: Ground
Access to FSB_VREF
1: FSB_VREF
2: Ground
Access to DDR_DIMM_VREF
1: DDR_DIMM_VREF
2: Ground
Wake Event Header
1: FP_SLP_HDR_N
2: Ground
SMBUS Access Header
1: SMB_DATA
2: GND
3: SMB_CLK
SMBUS Access Header
1: SMB_DATA
2: GND
3: SMB_CLK
SMBUS Access Header
1: SMB_DATA
2: GND
3: SMB_CLK
Technical Reference
Default
Position
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
Open
Do not short
January 2007
Order Number:315879-002