Rastergraf
Figure 3-5 THC63DV164 RGB to 24-bit TMDS Mapping Diagram
Notes:
24-bit Input Mode (BSEL = 1)
DE
D[23:0]
P
P
0
1
IDCK+
IDCK+
IDCK+
First Latching Edge
24-bit Mode Data Mapping
Pin Name
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
In the figure, clock edges represented by arrows signify the latching edge.
1
2
Color Pixel Components: R = RED, G = GREEN, B = BLUE
Bit significance within a color: [7:0] = [MSB:LSB]
3
P
P
N-1
N
DSEL = 0, EDGE = 0
DSEL = 0, EDGE = 1
DSEL = 1
1,2,3
P0
P1
P2
R0[7]
R1[7]
R2[7]
R0[6]
R1[6]
R2[6]
R0[5]
R1[5]
R2[5]
R0[4]
R1[4]
R2[4]
R0[3]
R1[3]
R2[3]
R0[2]
R1[2]
R2[2]
R0[1]
R1[1]
R2[1]
R0[0]
R1[0]
R2[0]
G0[7]
G1[7]
G2[7]
G0[6]
G1[6]
G2[6]
G0[5]
G1[5]
G2[5]
G0[4]
G1[4]
G2[4]
G0[3]
G1[3]
G2[3]
G0[2]
G1[2]
G2[2]
G0[1]
G1[1]
G2[1]
G0[0]
G1[0]
G2[0]
B0[7]
B1[7]
B2[7]
B0[6]
B1[6]
B2[6]
B0[5]
B1[5]
B2[5]
B0[4]
B1[4]
B2[4]
B0[3]
B1[3]
B2[3]
B0[2]
B1[2]
B2[2]
B0[1]
B1[1]
B2[1]
B0[0]
B1[0]
B2[0]
Programming On-board Devices 3-21
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