Rastergraf Eclipse3 Series User Manual page 3

Rastergraf
Figures and Tables
Table 1-1 Eclipse3 SDL Platform Display Timing Specifications................................. 1-9
Table 1-2 Eclipse3 FCode/Solaris Platform Display Timing Specifications................ 1-10
Table 1-3 Eclipse3 VGA/Windows Platform Display Timing Specifications ............. 1-10
Table 1-3 Rastergraf Ruggedization Levels Chart........................................................ 1-13
Table 1-4 Analog (VGA) Video Connector Pinout ...................................................... 1-16
Table 1-5 DVI-I Connector Pinout ............................................................................... 1-17
Table 1-6 Eclipse3 Software......................................................................................... 1-24
Table 1-7 Common Eclipse3 Configurations ............................................................... 1-24
Table 2-1 x86 Supported Video Modes ........................................................................ 2-19
Table 2-2 FCode Supported Display Modes................................................................. 2-22
Table 2-3 FCode Sync Output Modes .......................................................................... 2-23
Table 3-1 Borealis Configuration Settings ..................................................................... 3-9
Table 3-2 Eclipse3 ACR Register Bit Assignments ..................................................... 3-12
Table 3-3 Standard Graphics Display Formats............................................................. 3-13
Table 3-4 Eclipse3 Video Timing Parameter Request Form ........................................ 3-17
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Table 3-5 I C Device Addresses ................................................................................... 3-19
Figure 1-1 Borealis Block Diagram................................................................................ 1-4
Figure 1-2 DVI Digital Video Block Digram ................................................................. 1-5
Figure 2-1 Jumper Locations for the Fab Rev 1.2 Eclipse3PMC Board ........................ 2-6
Figure 2-2 Installation of a PMC Module into an Emerson MVME2604 ...................... 2-7
Figure 2-3 Installation of a PMC Module into the PMB-C ............................................ 2-8
Figure 2-4 Installation of the PMC Module into an Emerson CPV3060........................ 2-9
Figure 2-5 Jumper Locations for the Eclipse3PCI Board............................................. 2-11
Figure 2-6 Installation of a PCI Module into an Emerson MTX.................................. 2-12
Figure 2-7 Jumper Locations for the Eclipse3CPCI Board .......................................... 2-14
Figure 2-8 Installing a CompactPCI Board .................................................................. 2-15
Figure 3-1 Borealis Block Diagram................................................................................ 3-4
Figure 3-2 Internal RAMDAC Block Diagram .............................................................. 3-7
Figure 3-3 Video Display Timing Fields ...................................................................... 3-15
Figure 3-4 THC63DV164 Block Diagram ................................................................... 3-20
Figure 3-5 THC63DV164 RGB to 24-bit TMDS Mapping Diagram........................... 3-21