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Electrical Specifications
2.13
GTL+ FSB Specifications
Termination resistors are not required for most GTL+ signals, as these are integrated into the
processor silicon.Valid high and low levels are determined by the input buffers which compare a
signal's voltage with a reference voltage called GTLREF.
specifications. The GTL+ reference voltage (GTLREF) should be generated on the system board
using high precision voltage divider circuits.
Table 2-18. GTL+ Bus Voltage Definitions
Symbol
GTLREF
R
PULLUP
R
TT
COMP[1:0]
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The tolerances for this specification have been stated generically to enable the system designer to calculate the minimum
and maximum values across the range of V
3.
GTLREF should be generated from V
4.
The V
TT
5.
The Intel
of 210 Ω. Contact your Intel representative for further details and documentation.
6.
These pull-ups are to V
7.
R
is the on-die termination resistance measured at V
TT
8.
COMP resistance must be provided on the system board with 1% resistors. COMP[1:0] resistors are to V
34
Parameter
Bus Reference
(0.98 * 0.67) * V
Voltage
On die pullup for
BOOTSELECT
signal
Termination
Resistance
COMP Resistance
by a voltage divider of 1% resistors or 1% matched resistors.
TT
referred to in these specifications is the instantaneous V
915G/915GV/915P and 910GL Express chipset platforms use a pull-up resistor of 100 Ω and a pull-down resistor
®
.
TT
Table 2-18
Min
Typ
0.67 * V
TT
TT
500
—
54
60
59.8
60.4
.
TT
.
TT
/2 of the GTL+ output driver.
TT
§
lists the GTLREF
Max
Units
(1.02 * 0.67) * V
V
TT
Ω
5000
Ω
66
Ω
61
.
SS
Datasheet
1
Notes
2, 3, 4, 5
6
7
8
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