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Figure 5.
Deeper Sleep V
and Ultra Low Voltage (PSI# Asserted)
NOTE: Deeper Sleep mode tolerance depends on VID value.
Table 10.
FSB Differential BCLK Specifications
Symbol
V
CROSS
ΔV
CROSS
V
SWING
I
LI
Cpad
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Crossing Voltage is defined as absolute voltage where rising edge of BCLK0 is equal to the
falling edge of BCLK1.
3.
For Vin between 0 V and V
4.
Cpad includes die capacitance only. No package parasitics are included.
5.
ΔV
6.
Measurement taken from differential waveform.
7.
Measurement taken from single-ended waveform.
8.
Only applies to the differential rising edge (Clock rising and Clock# falling).
38
and I
Loadline Intel Core 2 Duo Processor - Low Voltage
CC
CC
Parameter
Crossing Voltage
Range of Crossing Points
Differential Output Swing
Input Leakage Current
Pad Capacitance
IH
is defined as the total variation of all crossing voltages as defined in Note 2.
CROSS
Min
Typ
0.3
300
-5
0.95
1.2
.
Electrical Specifications
1
Max
Unit
Notes
0.55
V
2, 7, 8
140
mV
2, 7, 5
mV
6
+5
µA
3
1.45
pF
4
Datasheet
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