Numerical Pin Assignment; Datasheet - Intel SL8J6 - Pentium 4 Processor Datasheet

Pin List and Signal Description
Table 24. Numerical Pin Assignment
Pin #
A2 THERMTRIP#
A3 VSS
A4 VSS_SENSE
A5 VCC_SENSE
A6 TESTHI11
A7 RESERVED
A8 VCC
A9 VSS
A10 VCC
A11 VSS
A12 VCC
A13 VSS
A14 VCC
A15 VSS
A16 VCC
A17 VSS
A18 VCC
A19 VSS
A20 VCC
A21 VSS
A22 RESERVED
A23 D2#
A24 VSS
A25 D3#
A26 VSS
B2 IGNNE#
B3 THERMDA
B4 VSS
B5 SMI#
B6 FERR#/PBE#
B7 VCC
B8 VSS
B9 VCC
B10 VSS
B11 VCC
B12 VSS
B13 VCC
B14 VSS
B15 VCC
B16 VSS
B17 VCC
48
Signal Buffer
Pin Name
Type
Asynch GTL+
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Source Synch
Power/Other
Source Synch
Power/Other
Asynch GTL+
Power/Other
Power/Other
Asynch GTL+
Asynch AGL+
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Table 24. Numerical Pin Assignment
Direction Pin #
Output B18 VSS
B19 VCC
Output B20 VSS
Output B21 D0#
Input B22 D1#
B23 VSS
B24 D6#
B25 D9#
B26 VSS
C1 TDI
C2 VSS
C3 PROCHOT#
C4 THERMDC
C5 VSS
C6 A20M#
C7 VSS
C8 VCC
C9 VSS
C10 VCC
C11 VSS
C12 VCC
Input/Output C13 VSS
C14 VCC
Input/Output C15 VSS
C16 VCC
Input C17 VSS
C18 VCC
C19 VSS
Input C20 VCC
Output C21 D4#
C22 VSS
C23 D7#
C24 D8#
C25 VSS
C26 D12#
D1 LINT0
D2 BPRI#
D3 VSS
D4 TCK
D5 TDO
D6 VSS
Signal Buffer
Pin Name
Type
Power/Other
Power/Other
Power/Other
Source Synch
Source Synch
Power/Other
Source Synch
Source Synch
Power/Other
TAP
Power/Other
Asynch GTL+
Power/Other
Power/Other
Asynch GTL+
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Source Synch
Power/Other
Source Synch
Source Synch
Power/Other
Source Synch
Asynch GTL+
Common Clock
Power/Other
TAP
TAP
Power/Other
Direction
Input/Output
Input/Output
Input/Output
Input/Output
Input
Input/Output
Input
Input/Output
Input/Output
Input/Output
Input/Output
Input
Input
Input
Output

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