Intel SL8J6 - Pentium 4 Processor Datasheet page 61

Pentium 4 processor on 90 nm process
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Table 25. Signal Description (Page 8 of 8)
Name
VCCIOPLL
VCC_SENSE
VCCVID
VCCVIDLB
VID[5:0]
VIDPWRGD
VSS
VSSA
VSS_SENSE
Datasheet
Type
VCCIOPLL provides isolated power for internal processor FSB PLLs. Follow the
Input
guidelines for VCCA, and refer to the Intel
Platform Design Guide for complete implementation details.
VCC_SENSE is an isolated low impedance connection to processor core power
Output
(V
). It can be used to sense or measure voltage near the silicon with little
CC
noise.
1.2 V is required to be supplied to the VCCVID pin if the platform is going to
Input
support the processor. Refer to the Intel
Platform Design Guide for more information.
1.2 V is required to be supplied to the VCCVIDLB pin if the platform is going to
Input
support the processor. Refer to the Intel
Platform Design Guide for more information.
VID[5:0] (Voltage ID) pins are used to support automatic selection of power
supply voltages (V
CC
processor and must be pulled up to 3.3 V with 1 kΩ 5% resistors. The voltage
supply for these pins must be valid before the voltage regulator (VR) can supply
Output
V
to the processor. Conversely, the VR output must be disabled until the
CC
voltage supply for the VID pins becomes valid. The VID pins are needed to
support the processor voltage specification variations. See
of these pins. The VR must supply the voltage that is requested by the pins, or
disable itself.
The processor requires this input to determine that the V
Input
voltages are stable and within specification.
VSS are the ground pins for the processor and should be connected to the
Input
system ground plane.
Input
VSSA is the isolated ground for internal PLLs.
VSS_SENSE is an isolated low impedance connection to processor core V
Output
can be used to sense or measure ground near the silicon with little noise.
Pin List and Signal Description
Description
®
865G/865GV/865PE/865P Chipset
®
865G/865GV/865PE/865P Chipset
®
865G/865GV/865PE/865P Chipset
). These are open drain signals that are driven by the
§
Table 3
for definitions
and V
CCVID
CCVIDLB
. It
SS
61

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