Texas Instruments TMS320C67X Reference Manual page 265

SADD
Syntax
Compatibility
Opcode
31 29 28 27
creg z dst
3 1 5
Description
Execution
SPRU733
Add Two Signed Integers With Saturation
SADD (.unit) src1, src2, dst
.unit = .L1 or .L2
C62x, C64x, C67x, and C67x+ CPU
23 22 18
src2
5
Opcode map field used...
src1
src2
dst
src1
src2
dst
src1
src2
dst
src1
src2
dst
src1 is added to src2 and saturated, if an overflow occurs according to the
following rules:
1) If the dst is an int and src1 + src2 > 2
2) If the dst is an int and src1 + src2 < −2
3) If the dst is a long and src1 + src2 > 2
4) If the dst is a long and src1 + src2 < −2
The result is placed in dst. If a saturate occurs, the SAT bit in the control status
register (CSR) is set one cycle after dst is written.
if (cond) src1 +s src2
else nop
Add Two Signed Integers With Saturation
17 13 12 11
src1 x
5 1
For operand type...
sint
xsint
sint
xsint
slong
slong
scst5
xsint
sint
scst5
slong
slong
31
− 1, then the result is 2
31
, then the result is −2
39
− 1, then the result is 2
39
, then the result is −2
dst
→
SADD
5 4 3 2 1
op 1 1 0 s p
7 1
Unit Opfield
.L1, .L2 001 0011
.L1, .L2 011 0001
.L1, .L2 001 0010
.L1, .L2 011 0000
31
− 1.
31
.
39
− 1.
39
.
Instruction Set 3-205
0
1