Xilinx LogiCORE 1000BASE-X User Manual page 30

R
Figure 2-6
using a TBI without the optional PCS Management Registers.
30
shows the pinout for the Ethernet 1000BASE-X PCS/PMA or SGMII core when
GMII gmii_txd[7:0]
gmii_tx_en
gmii_tx_er
gmii_rxd[7:0]
gmii_rx_dv
gmii_rx_er
gmii_isolate
MDIO Replacement
configuration_vector[3:0]
reset
gtx_clk
Figure 2-6: Component Pinout Using Ten-Bit Interface
without PCS Management Registers
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Chapter 2: Core Architecture
Ten-Bit Interface (TBI)
tx_code_group[9:0]
loc_ref
ewrap
en_cdet
rx_code_group0[9:0]
rx_code_group1[9:0]
pma_rx_clk0
pma_rx_clk1
signal_detect
status_vector[4:0]
Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
UG155 March 24, 2008