Xilinx LogiCORE 1000BASE-X User Manual page 146

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Table 9-30: SGMII Control (Register 0)
146
Bit(s) Name
0.15 Reset 1 = Core Reset
0 = Normal Operation
0.14 Loopback 1 = Enable Loopback Mode
0 = Disable Loopback Mode
When used with a RocketIO
transceiver, the core is placed in
internal loopback mode.
With the TBI version, Bit 1 is
connected to ewrap. When set to '1'
indicates to the external PMA
module to enter loopback mode.
See
0.13 Speed Always returns a '0' for this bit.
Selection Together with bit 0.6, speed selection
(LSB) of 1000 Mbps is identified
0.12 Auto- 1 = Enable SGMII Auto-Negotiation
Negotiation Process
Enable
0 = Disable SGMII Auto-Negotiation
Process
0.11 Power Down 1 = Power down
0 = Normal operation
With the PMA option, when set to '1'
the RocketIO transceiver is placed in
a low-power state. This bit requires a
reset (see bit 0.15) to clear.
With the TBI version this register bit
has no effect.
0.10 Isolate 1 = Electrically Isolate SGMII logic
from GMII
0 = Normal operation
0.9 Restart Auto- 1 = Restart Auto-Negotiation
Negotiation Process across SGMII link
0 = Normal Operation
0.8 Duplex Mode Always returns a '1' for this bit to
signal Full-Duplex Mode
0.7 Collision Test Always returns a '0' for this bit to
disable COL test
0.6 Speed Always returns a '1' for this bit.
Selection Together with bit 0.13, speed
(MSB) selection of 1000 Mbps is identified
www.xilinx.com
Chapter 9: Configuration and Status
Description
"Loopback," page 197.
Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
Default
Attributes
Value
read/write 0
self clearing
read/write 0
returns 0 0
read/write 1
read/ write 0
read/write 1
read/write 0
self clearing
returns 1 1
returns 0 0
returns 1 1
UG155 March 24, 2008