Integration Of The 1-Gigabit Ethernet Mac Using A Rocketio Transceiver - Xilinx LogiCORE 1000BASE-X User Manual

Integrating with the 1-Gigabit Ethernet MAC Core

Integration of the 1-Gigabit Ethernet MAC Using a RocketIO Transceiver

Virtex-II Pro Devices
Figure 13-2
the Ethernet 1000BASE-X PCS/PMA or SGMII core (when used in 1000BASE-X mode) to
the 1-Gigabit Ethernet MAC core.
Features of this configuration include:
•
Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
UG155 March 24, 2008
illustrates the connections and clock management logic required to interface
IOB LOGIC
brefclkp
IBUFGDS
IPAD
IPAD
brefclkn
DCM
BUFG
CLKIN CLK0
BUFG
FB
CLK2X180
1-Gigabit Ethernet
MAC
LogiCORE
gtx_clk
gmii_rx_clk
gmii_txd[7:0]
gmii_tx_en
gmii_tx_er
gmii_rxd[7:0]
gmii_rx_dv
gmii_rx_er
mdc
mdio_in
mdio_out
mdio_tri
Figure 13-2: 1-Gigabit Ethernet MAC Extended to Include 1000BASE-X PCS and
Direct internal connections are made between the GMII interfaces between the two
cores.
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brefclk (62.5MHz)
userclk (62.5MHz)
userclk2 (125MHz)
component_name _block
(Block Level from example design)
Ethernet 1000BASE-X
PCS/PMA or SGMII
LogiCORE
userclk
userclk2
gmii_txd[7:0]
gmii_tx_en
gmii_tx_er
gmii_rxd[7:0]
gmii_rx_dv
gmii_rx_er
mdc
mdio_in
mdio_out
no
mdio_tri
connection
PMA Using a Virtex-II Pro MGT
Virtex-II Pro
RocketIO
(GT_ETHERNET_1)
brefclk
txusrclk
txusrclk2
rxusrclk
rxusrclk2
RocketIO I/F
R
181