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TIMER 1
CAOF (T-F/F)
f
/4
OSC
f
/8
OSC
f
/16
OSC
11-4
T1CON. 7-.6
16-Bit Up-Counter
MUX
(Read-Only)
16-Bit Compatator
Timer 1 High/Low
Buffer Register
Timer 1 Data
High/Low Register
Data Bus
NOTE:
Match signal is occurrd only in interval mode.
Figure 11-3. Timer 1 Block Diagram
OVF
Clear
T1CON.3
R
Match
(note)
T1CON.1
MUX
T1CON.5-.4
T1CON.3
Match Signal
T1OVF
S3F80P5_UM_ REV1.00
T1CON.2
T1CON.0
IRQ1
IRQ1
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